Photosensor arrays may be associated with readout and raw-image storage circuits that provide data in a different order than the order of pixels within the array. For example, typically bond-per-pixel stacked-wafer photosensor designs have a pixel array die with pixels arranged in groups, with each group containing 8, 16, 32, or 64 pixels, each pixel of the group being read in sequence through an analog-to-digital converter (ADC) into a random-access memory (RAM) image memory on at least a second die. In some systems, the RAM may be Dynamic RAM (DRAM).
Word length of DRAM used for frame memory may be quite large. In a particular embodiment having an image sensor with 640×512 blocks, 64 pixels per block, having 640 blocks per row, at 12 bits per ADC, the width of writes for a single row may be 7680 bits. Since all 512 rows of a frame may write into the image DRAM simultaneously, the image DRAM of a particular embodiment may be written in 64 writes of 3,932,160 bits each, with each write including ADC data for a corresponding pixel of each block.